Video Processing IP Cores

The Video Processing IP Cores are implemented on the XILINX FPGAs and provide the following applications:

  • Decoder PAL, NTSC, DVB
  • Subcarrier Carrier Recovery
  • TV Test Pattern Generator
We provide the integration of the IP Cores in your application as well as porting to other platforms (Altera, Lattice). Please send us a request.

Example: FuBK test pattern with animation and Zone Plate test, implemented on XILINX Spartan 3 using combinative logic only

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